The output of a Digital Delta-Sigma Modulator (DDSM) is always a periodic signal and the input is constant. A hybrid DDSM is a premiere to its conventional counterpart for having a potential speed, by the choice of its smaller bus. This paper offers an implementation for multi-stage noise shaping (MASH) DDSMs that includes four modulators named hybrid DDSM-1, DDSM-2, DDSM-3, and DDSM-4. Also, it introduces a new solution, where the desired ratio in fractional frequency synthesizers is formed by combining four different modulos. The first stage modulator is a programmable modulus EFM1 and has a modulus M1 that is not a power of 2. The second, third, and fourth stage modulators are modified MASH 1-1, multi-modulus MASH 1-1-1, and the efficiently dithered MASH 1-1-1-1 modulator that has conventional modulus  M2, M3, and M4, respectively. The M1 modulus is optimally selected to synthesize the new structure of the desired frequencies. Design results confirm the suppositional predictions. In addition, the results of the circuit implementation proposed method offer a 17% reduction in hardware complexity.

Phase locked loop (PLL) circuits are widely used in fractional frequency synthesizers. In these synthesizers, fractional multiples of the reference frequency can be synthesized, so the reference frequency and the bandwidth of the loop can be increased. This frequency synthesizer is commonly used due to its flexibility and convenient frequency adjustment. In this paper, a PLL circuit of the transistor level is designed in which a hybrid digital sigma-delta modulator with reduced hardware is used. This Digital Delta-Sigma Modulator (DDSM) has four stages that have a lower noise level and power consumption than the conventional type. This PLL circuit has a third-order loop filter and a voltage-controlled oscillator of the NMOS type. In the PLL circuit, two counters are used in its feedback path. In the proposed divider, there is a dual divider P / P + 1 (in this case 5, 6) which divides its input signal by 5, 6 according to the control input. A design example for the PLL is provided. A third stage digital Delta-Sigma modulator with reduced hardware is also used to control these counters. This modulator has less power consumption than the conventional method and has less number of transistors by 85%.

This paper analyzes the phase noise of the single loop second-order frequency fractional-N synthesizer. The aim of this paper is the reduction of the output phase noise in the application of commercial and military subsystems as well as general local oscillators. The mathematical model of PLL based frequency synthesizer is analyzed to develop the minimum phase noise in the specific frequency range. An exact closed form relationship between bandwidth and output phase noise of the frequency synthesizer as well as the bandwidth-phase noise diagram is extracted by using this closed form relationship. From the analysis and simulation results, we observe that the system has minimum phase noise at a particular closed-loop bandwidth. To validate simulation results, the synthesizer is implemented on the low loss professional printed circuit board (PCB). Measurement setup is scheduled on spectrum analyzer 8562A in the span of 5MHz and 10MHz. These measurements show excellent results in output spectrum of the frequency synthesizer.

To achieve a low reference spur for an Integer-N frequency synthesizer, a new spur reducing technique was proposed. To reduce the size of periodic ripples on the VCO control voltage, the low pass filter, and the charge pump were added with a spur reduction system. By lowering the amplitude of the periodic ripple on the VCO control voltage, we managed to lower the reference spur. The introduced technique removes the necessity to decrease bandwidth and CVO gain reference spur suppressing. To demonstrate the effectiveness of the proposed structure, a 2. 06 – 2. 22 GHz frequency synthesizer was used and the 180-nm CMOS technology was used for post-layout simulation. The proposed frequency synthesizer represents the reference spur of-85. 84 dBc at 20 MHz offset and phase noise of-108dBc/Hz at 200 kHz offset frequency also it is locked after 2. 8us while occupied 0. 35 mm2 of the chip area.

Non-fragile H¥ observer design is the main problem of this paper. Using continuous frequency distribution, the stability conditions based on integer order Lyapunov theorem are derived for Lipschitz class of nonlinear fractional order systems. The proposed observer is stable beside the existence of both gain perturbation and input disturbance. For the first time, in this paper a systematic method is suggested based on linear matrix inequality to find an optimal observer gain to minimize both the effects of disturbance on the synchronization error and norm of the observer gain. A comparison has done between this observer and previous research on resilient H¥ observer design for nonlinear fractional order systems based on fractional order Lyapunov method. The comparison shows a much broader range of feasible response for the proposed method of this paper besides simpler computing. After presenting thediscussion, chaos synchronization is simulated to show the effectiveness of the proposed method in the end.

Fungi are promising sources of novel bioactive metabolites due to their abundant extracellular enzyme production, easy extraction, and purification. This study aimed to investigate the capability of some plant-associated fungi to produce L-asparaginase enzymes. Twenty plant-associated fungi were inoculated into a modified Czapex Dox broth medium containing 10.0 g/L L-asparagine and 0.3 mL of 2.5% phenol red (pH 7), and maintained at 25 ± 2 °C, for 7 days. The L-asparaginase enzyme activity was evaluated by measuring the amount of free ammonia released through the hydrolysis of L-asparagine through UV-visible spectrophotometry analysis at 450 nm. Seventy percent of the studied fungi could produce the L-asparaginase enzyme. Trichoderma atroviride, Aspergillus flavus, and T. harzianum demonstrated the highest production of L-asparaginase enzyme by 0.47, 0.35, and 0.24 U/mL, respectively. Furthermore, Cladosporium cladosporioides, C. ramotenellum and Verticillium dahliae with 0.022, 0.009 and 0.015 U/mL, respectively, showed the lowest production of the L-asparaginase enzyme among the others. This research also reports the first successful production of the L-asparaginase enzyme from Bipolaris oryzae, Curvularia trifolii, T. atroviride, T. harzianum, and T. virens. Plant-associated fungi represent a promising resource for the pharmaceutical industry due to their ability to produce bioactive compounds such as L-asparaginase. While their use may contribute to more sustainable and potentially cost-effective production, successful large-scale application depends on multiple factors beyond enzyme production, including cultivation feasibility, purification processes, and regulatory considerations.